Department
of Electrical Engineering Physical Electronics
The
Iby and Aladar Fleischman Faculty of Engineering, Tel
Aviv University,
Ramat Aviv 69978, ISRAEL
Department secretary: 972-3-640-8765
Fax: +972-3-642-3508
Advanced Laboratory for Electronic
Devices
Supported by Intel Corp. (Israel)
Objective
Acquaint the students of the semiconductor device track with both manufacturing and characterization methods providing hands-on experience with industrial and research techniques
Action items
1. Target a low number
of participants per student group to provide hands-on experience for every
student.
2. Include versatile
processing technology, including metallization for Schottky and Ohmic contacts,
oxidation for MOS capacitors on silicon and other devices.
3. Offer various characterization
techniques used by industry at different levels of device processing
4. Review the physical
background of common semiconductor device processing and characterization
techniques.
Program
Mtg. 1 - Introductory
meeting
The student will receive
the lab manuals, an overview of lab activity and requirements, safety instructions,
and will be assigned a group.
Mtg. 2 - Conductivity
Purpose: acquiring
basic methods of conductivity characterization
Method: the
student will be provided with ready-made devices and samples and will apply
four-point probe, hot probe, and Hall effect to characterize conductivity
type and magnitude.
Mtg. 3 - Metallization
and Photolithography
Purpose: basic
considerations of metal choice, deposition methods, defining contacts using
photolithography
and etching
Method: the
student will prepare Si and oxidized Si wafers for deposition and will
deposit aluminum layers using ion beam sputtering in ultra-high vacuum.
Afterwards, the students perform lithography and etching procedures (in
the clean room).
Mtg. 4 - Annealing
and formation of an Ohmic contact
Purpose: Study
the effect of post-deposition annealing on the metal-semiconductor junction
transport as well as the dependence of the Ohmic characteristics on the
annealing duration.
Method: The
contacts, previously defined by lithography and etching, will be heat-treated
in several steps, following each the contact resistivity will be assessed.
Mtg. 5 - Schottky diode
Purpose: Characterization
of Schottky diode parameters.
Method: I-V
and C-V methods will be used to characterize the Schottky diode contacts
previously defined using lithography and etching.
Mtg. 6 - MOS capacitor
I
Purpose: C-V
and I-V characterization of MOS capacitors. Understanding the effect of
interface charges on the capacitor characteristics.
Method: I-V
and C-V measurements at various frequencies, in the dark and under illumination,
for various contact areas.
Mtg. 7 - MOS capacitor
II
Purpose: C-V
characterization of MOS capacitors in deep depletion regime.
Method: same.
Mtg. 8- MOS Transistor
I
Purpose: I-V
Characteristics of a MOS transistor.
Method: I-V
measurements of a ready-made MOSFET transistor and characterization of
its small and large signal equivalent circuits.
Mtg. 9 - A visit to
one of the local microelectronics manufacturers (Intel).
Stuff members to contact for details
| Prof. Yoram Shapira | Tel. 03-6409452 | shapira@eng.tau.ac.il |
| Dr. Arie Ruzin | Tel. 03-6405214 | aruzin@eng.tau.ac.il |
| Yigal Zidon | Tel. 03-6408015 | zidon@eng.tau.ac.il |
| Tamara Baksht | Tel. 03-6408015 | baksht@eng.tau.ac.il |
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